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ADIVAdrc
DESIGN RULE CHECK
ADIVA's Design Rule Check tool,
ADIVAdrc, not
only checks for Design Problems it also simulates the manufacturing
processes required to produce a functional circuit board. The ADIVA
easy-to-use tools are your answer to automating Design Verification and
Review.
No script writing….no
programming…..no consultants…..no dedicated support personnel.
ADIVA
- Developed by PCB Designers for PCB Designers
- Low Cost of Ownership
- Easy to install…Easy to Use…Easy to Maintain
- Be up and running in hours—not days
- Fully Integrated into your CAD System
ADIVAnet
Net List Compare
Verifies the interconnect integrity of the manufacturing data.
- Build netlist from GERBER or ODB++ database
- Extract netlist from CAD database
- Checks for opens, shorts, and mismatched CAD
data
- GRAPHICALLY display netlist differences and
marks location back in CAD System
- Creates Web based Screen Shots in Easy to
Read Table Format
ADIVAdrc
Design Rule Check
Analyze your design for the problems
that impact Design Performance and fabrication/assembly
- Customer controls Design Rule Checks
- Supports Multiple Rules in Menu driven format
- Verifies what the CAD system should check
- Validate what the CAD system does not check
- Analyzes and reports Design Integrity
Problems
- Verifies Circuit Performance
- Focus on correcting Critical Problems
- Run checks by net or group of nets
- Full Graphical Design Review & Reporting
- Link Critical Violations to CAD for easy
correction
- Creates Web based Screen
Shots in Easy to Read Table Format
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